Extracting a simplified view of design functionality based on vector simulation

Authors:
Onur Guzey;Charles Wen;Li-C. Wang;Tao Feng;Hillel Miller;Magdy S. Abadir
Affiliations:
University of California, Santa Barbara;University of California, Santa Barbara;University of California, Santa Barbara;Cadence Desing Systems, Inc;Freescale Semiconductor Israel;Freescale Semiconductor
Venue:
HVC'06 Proceedings of the 2nd international Haifa verification conference on Hardware and software, verification and testing
Year:
2006

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Abstract

This paper presents a simulation-based methodology for extracting a simplified view of design functionality from a given module. Such a simplified design view can be used to facilitate test pattern justification from the outputs of the module to the inputs of the module. In this work, we formulate this type of design simplification as a learning problem. By developing a scheme for learning word-level functions, we point out that the core of the problem is to develop an efficient Boolean learner. We discuss the implementation of such a Boolean learner and compare its performance with the one of best-known learning algorithms, the Fourier analysis based method. Experimental results are presented to illustrate the implementation of the simulation-based methodology and its usage for extracting a simplified view of Open RISC 1200 datapath.