Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Fault-Tolerant SoFtware Reliability Modeling
IEEE Transactions on Software Engineering
Data Diversity: An Approach to Software Fault Tolerance
IEEE Transactions on Computers - Fault-Tolerant Computing
Conceptual Modeling of Coincident Failures in Multiversion Software
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Reliability evaluation of fly-by-wire computer systems
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Accurate static branch prediction by value range propagation
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Computer organization and architecture (4th ed.): designing for performance
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Computer architecture (2nd ed.): a quantitative approach
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Bidwidth analysis with application to silicon compilation
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Transparent Redundancy in the Time-Triggered Architecture
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Executable Assertions for Detecting Data Errors in Embedded Control Systems
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Data flow transformations to detect results which are corrupted by hardware faults
HASE '96 Proceedings of the 1996 High-Assurance Systems Engineering Workshop
Software implemented hardware fault tolerance
Software implemented hardware fault tolerance
Fault-tolerant computing for radiation environments
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A Design Diversity Metric and Reliability Analysis for Redundant Systems
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A Design Diversity Metric and Analysis of Redundant Systems
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A New Approach to Software-Implemented Fault Tolerance
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Logic soft errors in sub-65nm technologies design and CAD challenges
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IEEE Transactions on Computers
Software-controlled fault tolerance
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Using loop invariants to fight soft errors in data caches
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Static typing for a faulty lambda calculus
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Fault-tolerant typed assembly language
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Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs
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IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors
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Globally optimized robust systems to overcome scaled CMOS reliability challenges
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Software protection mechanisms for dependable systems
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System-on-Chip Test Architectures: Nanometer Design for Testability
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AN-Encoding Compiler: Building Safety-Critical Systems with Commodity Hardware
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Speculation for Parallelizing Runtime Checks
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System-level hardware-based protection of memories against soft-errors
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Dependable and Historic Computing
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Expert Systems with Applications: An International Journal
Journal of Electronic Testing: Theory and Applications
A dynamic approach to tolerate soft errors
Cluster Computing
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Errors in computing systems can cause abnormal behavior and degrade data integrity and system availability. Errors should be avoided especially in embedded systems for critical applications. However, as the trend in VLSI technologies has been toward smaller feature sizes, lower supply voltages, and higher frequencies, there is a growing concern about temporary errors as well as permanent errors in embedded systems; thus, it is very essential to detect those errors. Software Implemented Hardware Fault Tolerance (SIHFT) is a low-cost alternative to hardware fault tolerance techniques for embedded processors: It does not require any hardware modification of Commercial Off-The-Shelf (COTS) processors. ED4I is a SIHFT technique that detects both permanent and temporary errors by executing two "different" programs (with the same functionality) and comparing their outputs. ED4I maps each number, x, in the original program into a new number x', and then transforms the program so that it operates on the new numbers so that the results can be mapped backwards for comparison with the results of the original program. The mapping in the transformation of ED4I is x'=k·x for integer numbers, where k determines the fault detection probability and data integrity of the system. For floating point numbers, we find a value of kf for the fraction and ke for the exponent separately and use k=kf脳2ke for the value of k. We have demonstrated how to choose an optimal value of k for the transformation. This paper shows that, for integer programs, the transformation with k=-2 was the most desirable choice in six out of seven benchmark programs we simulated. It maximizes fault detection probability under the condition that data integrity is highest.