MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Transient fault detection via simultaneous multithreading
Proceedings of the 27th annual international symposium on Computer architecture
ED4I: Error Detection by Diverse Data and Duplicated Instructions
IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems
A C/C++ Source-to-Source Compiler for Dependable Applications
DSN '00 Proceedings of the 2000 International Conference on Dependable Systems and Networks (formerly FTCS-30 and DCCA-8)
Detecting Processor Hardware Faults by Means of Automatically Generated Virtual Duplex Systems
DSN '02 Proceedings of the 2002 International Conference on Dependable Systems and Networks
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
A New Approach to Software-Implemented Fault Tolerance
Journal of Electronic Testing: Theory and Applications
Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes
IEEE Transactions on Dependable and Secure Computing
SWIFT: Software Implemented Fault Tolerance
Proceedings of the international symposium on Code generation and optimization
How to Cope with SEU/SET at System Level?
IOLTS '05 Proceedings of the 11th IEEE International On-Line Testing Symposium
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Software-Implemented Hardware Fault Tolerance
Software-Implemented Hardware Fault Tolerance
The N-Version Approach to Fault-Tolerant Software
IEEE Transactions on Software Engineering
Efficient fault tolerance in multi-media applications through selective instruction replication
Proceedings of the 2008 workshop on Radiation effects and fault tolerance in nanometer technologies
Budget-Dependent Control-Flow Error Detection
IOLTS '08 Proceedings of the 2008 14th IEEE International On-Line Testing Symposium
Compiler-managed register file protection for energy-efficient soft error reduction
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Compiler-assisted soft error detection under performance and energy constraints in embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Fool me twice: Exploring and exploiting error tolerance in physics-based animation
ACM Transactions on Graphics (TOG)
Selective replication: A lightweight technique for soft errors
ACM Transactions on Computer Systems (TOCS)
Reliability through redundant parallelism for micro-satellite computing
ACM Transactions on Embedded Computing Systems (TECS)
A compiler-microarchitecture hybrid approach to soft error reduction for register files
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
COTS-based applications in space avionics
Proceedings of the Conference on Design, Automation and Test in Europe
A Hybrid Approach for Detection and Correction of Transient Faults in SoCs
IEEE Transactions on Dependable and Secure Computing
Soft Errors in Modern Electronic Systems
Soft Errors in Modern Electronic Systems
A hybrid hardware--software technique to improve reliability in embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
A 11-transistor nanoscale CMOS memory cell for hardening to soft errors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring the Limitations of Software-based Techniques in SEE Fault Coverage
Journal of Electronic Testing: Theory and Applications
Compiler-Directed Soft Error Mitigation for Embedded Systems
IEEE Transactions on Dependable and Secure Computing
Assuring application-level correctness against soft errors
Proceedings of the International Conference on Computer-Aided Design
Low Overhead Soft Error Mitigation Techniques for High-Performance and Aggressive Designs
IEEE Transactions on Computers
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Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their programmability and cost-effectiveness. Recent advances in electronic technologies have allowed remarkable improvements in their performance. However, they have also made microprocessors more susceptible to transient faults induced by radiation. These non-destructive events (soft errors), may cause a microprocessor to produce a wrong computation result or lose control of a system with catastrophic consequences. Therefore, soft error mitigation has become a compulsory requirement for an increasing number of applications, which operate from the space to the ground level. In this context, this paper uses the concept of selective hardening, which is aimed to design reduced-overhead and flexible mitigation techniques. Following this concept, a novel flexible version of the software-based fault recovery technique known as SWIFT-R is proposed. Our approach makes possible to select different registers subsets from the microprocessor register file to be protected on software. Thus, design space is enriched with a wide spectrum of new partially protected versions, which offer more flexibility to designers. This permits to find the best trade-offs between performance, code size, and fault coverage. Three case studies have been developed to show the applicability and flexibility of the proposal.