Transient-Fault Recovery for Chip Multiprocessors

Authors:
Mohamed A. Gomaa;Chad Scarbrough;T. N. Vijaykumar;Irith Pomeranz
Affiliations:
Purdue University;Purdue University;Purdue University;Purdue University
Venue:
IEEE Micro
Year:
2003

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Abstract

Chip-level redundant threading with recovery (CRTR) for chip multiprocessors extends previous transient-fault detection schemes to provide fault recovery. To hide interprocessor latency, CRTR uses a long slack enabled by asymmetric commit and uses the trailing thread state for recovery. CRTR increases bandwidth supply by pipelining communication paths and reduces bandwidth demand by extending the dependence-based checking elision.