ED4I: Error Detection by Diverse Data and Duplicated Instructions
IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems
Advancements in dependable time-triggered communication
SEUS'07 Proceedings of the 5th IFIP WG 10.2 international conference on Software technologies for embedded and ubiquitous systems
Integrating automotive applications using overlay networks on top of a time-triggered protocol
Proceedings of the 13th Monterey conference on Composition of embedded systems: scientific and industrial issues
The design of real-time fault detectors
OTM'05 Proceedings of the 2005 Confederated international conference on On the Move to Meaningful Internet Systems - Volume >Part I
Experimental evaluation of the DECOS fault-tolerant communication layer
SAFECOMP'07 Proceedings of the 26th international conference on Computer Safety, Reliability, and Security
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The time-triggered architecture is architecture for distributed embedded real-time systems in high dependability applications. The core element of the architecture is the time-triggered communication protocol TTP/C. This paper shows how a Fault-Tolerance Layer that performs those functions that are necessary for the implementation of redundancy can extend TTP/C. The hardware/software interface of the host computer, where the application software is executing, is changed, neither in the value domain, nor in the temporal domain, by this implementation of fault-tolerance in the communication system. Provided the application software has been properly organized, it is thus possible to implement redundancy transparently, i.e., without any modification of the function and timing of the application system. The paper also discusses the experiences gained from a prototype implementation of the fault-tolerance layer in the microprogram of a TTP/C controller chip.