Scalable Processors in the Billion-Transistor Era: IRAM

  • Authors:
  • Christoforos E. Kozyrakis;Stylianos Perissakis;David Patterson;Thomas Anderson;Krste Asanovic;Neal Cardwell;Richard Fromm;Jason Golbus;Benjamin Gribstad;Kimberly Keeton;Randi Thomas;Noah Treuhaft;Katherine Yelick

  • Affiliations:
  • -;-;-;-;-;-;-;-;-;-;-;-;-

  • Venue:
  • Computer
  • Year:
  • 1997

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Abstract

T his article proposes a new architecture called "trace processors," which consist of multiple, distributed on-chip processor cores, each of which simultaneously executes a different trace. All but one core executes the traces speculatively, having used branch prediction to select traces that follow the one executing. (Although this architectural concept is similar to multiscalar processors, described in a sidebar, it does not require explicit compiler support). The authors argue that future processors will rely heavily on replication and hierarchy, and they show how their architecture exploits these concepts.