Performance analysis of hierarchical cache-consistent multiprocessors
Performance Evaluation - Selected papers from the international seminar on performance of distributed and parallel systems
Comparison of hardware and software cache coherence schemes
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Cache miss equations: an analytical representation of cache misses
ICS '97 Proceedings of the 11th international conference on Supercomputing
An analysis of database workload performance on simultaneous multithreaded processors
Proceedings of the 25th annual international symposium on Computer architecture
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
B-tree page size when caching is considered
ACM SIGMOD Record
Cache-conscious structure layout
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
The Asilomar report on database research
ACM SIGMOD Record
SIGMETRICS '86/PERFORMANCE '86 Proceedings of the 1986 ACM SIGMETRICS joint international conference on Computer performance modelling, measurement and evaluation
Making B+- trees cache conscious in main memory
SIGMOD '00 Proceedings of the 2000 ACM SIGMOD international conference on Management of data
Approximating block accesses in database organizations
Communications of the ACM
Analysis and performance of inverted data base structures
Communications of the ACM
Optimizing multidimensional index trees for main memory access
SIGMOD '01 Proceedings of the 2001 ACM SIGMOD international conference on Management of data
Main-memory index structures with fixed-size partial keys
SIGMOD '01 Proceedings of the 2001 ACM SIGMOD international conference on Management of data
Improving index performance through prefetching
SIGMOD '01 Proceedings of the 2001 ACM SIGMOD international conference on Management of data
Fractal prefetching B+-Trees: optimizing both cache and disk performance
Proceedings of the 2002 ACM SIGMOD international conference on Management of data
AlphaSort: a cache-sensitive parallel external sort
The VLDB Journal — The International Journal on Very Large Data Bases
Hash Joins and Hash Teams in Microsoft SQL Server
VLDB '98 Proceedings of the 24rd International Conference on Very Large Data Bases
A Study of Index Structures for Main Memory Database Management Systems
VLDB '86 Proceedings of the 12th International Conference on Very Large Data Bases
Cache Conscious Indexing for Decision-Support in Main Memory
VLDB '99 Proceedings of the 25th International Conference on Very Large Data Bases
Database Architecture Optimized for the New Bottleneck: Memory Access
VLDB '99 Proceedings of the 25th International Conference on Very Large Data Bases
DBMSs on a Modern Processor: Where Does Time Go?
VLDB '99 Proceedings of the 25th International Conference on Very Large Data Bases
Cache-Conscious Concurrency Control of Main-Memory Indexes on Shared-Memory Multiprocessor Systems
Proceedings of the 27th International Conference on Very Large Data Bases
Benchmarking Database Systems A Systematic Approach
VLDB '83 Proceedings of the 9th International Conference on Very Large Data Bases
Cache Conscious Algorithms for Relational Query Processing
VLDB '94 Proceedings of the 20th International Conference on Very Large Data Bases
A Portable Programming Interface for Performance Evaluation on Modern Processors
International Journal of High Performance Computing Applications
Making CSB+-Trees processor conscious
DaMoN '05 Proceedings of the 1st international workshop on Data management on new hardware
Adaptive Index Utilization in Memory-Resident Structural Joins
IEEE Transactions on Knowledge and Data Engineering
Index compression is good, especially for random access
Proceedings of the sixteenth ACM conference on Conference on information and knowledge management
Towards efficient main-memory use for optimum tree index update
Proceedings of the VLDB Endowment
WSEAS Transactions on Computers
Hash Join Optimization Based on Shared Cache Chip Multi-processor
DASFAA '09 Proceedings of the 14th International Conference on Database Systems for Advanced Applications
Trees or grids?: indexing moving objects in main memory
Proceedings of the 17th ACM SIGSPATIAL International Conference on Advances in Geographic Information Systems
MCC-DB: minimizing cache conflicts in multi-core processors for databases
Proceedings of the VLDB Endowment
FAST: fast architecture sensitive tree search on modern CPUs and GPUs
Proceedings of the 2010 ACM SIGMOD International Conference on Management of data
The HV-tree: a memory hierarchy aware version index
Proceedings of the VLDB Endowment
Designing fast architecture-sensitive tree search on modern multicore/many-core processors
ACM Transactions on Database Systems (TODS)
Top-k most influential locations selection
Proceedings of the 20th ACM international conference on Information and knowledge management
Massive concurrent deletion of keys in b*-tree
PPAM'05 Proceedings of the 6th international conference on Parallel Processing and Applied Mathematics
Foundations and Trends in Databases
VAST-Tree: a vector-advanced and compressed structure for massive data tree traversal
Proceedings of the 15th International Conference on Extending Database Technology
Adapting the b+-tree for asymmetric i/o
ADBIS'12 Proceedings of the 16th East European conference on Advances in Databases and Information Systems
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In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cache-conscious indices are designed to improve performance by reducing the number of processor cache misses that are incurred during a search operation. Conventional wisdom suggests that the index's node size should be equal to the cache line size in order to minimize the number of cache misses and improve performance. As we show in this paper, this design choice ignores additional effects, such as the number of instructions executed and the number of TLB misses, which play a significant role in determining the overall performance. To capture the impact of node size on the performance of a cache-conscious B+ tree (CSB+-tree), we first develop an analytical model based on the fundamental components of the search process. This model is then validated with an actual implementation, demonstrating that the model is accurate. Both the analytical model and experiments confirm that using node sizes much larger than the cache line size can result in better search performance for the CSB+-tree.