Performance analysis of multiprocessor cache consistency protocols using generalized timed Petri nets

Authors:
Mary K. Vernon;Mark A. Holliday
Affiliations:
Computer Sciences Department, University of Wisconsin - Madison, Madison, WI;Computer Sciences Department, University of Wisconsin - Madison, Madison, WI
Venue:
SIGMETRICS '86/PERFORMANCE '86 Proceedings of the 1986 ACM SIGMETRICS joint international conference on Computer performance modelling, measurement and evaluation
Year:
1986

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Abstract

We use an exact analytical technique, based on Generalized Timed Petri Nets (GTPNs), to study the performance of shared bus cache consistency protocols for multiprocessors. We develop a general framework within which the key characteristics of the Write-Once protocol and four enhancements that have been combined in various ways in the literature can be identified and evaluated. We then quantitatively assess the performance gains for each of the four enhancements. We consider three levels of data sharing in our workload models. One of the enhancements substantially improves system performance in all cases. Two enhancements are shown to have negligible effect over the range of workloads analyzed. The fourth enhancement shows a small improvement for low levels of sharing, but shows more substantial improvement as sharing is increased, if we assume a “good access pattern”. The effects of two architectural parameters, the blocksize and the main memory cycle time are also considered.