Evaluating Associativity in CPU Caches
IEEE Transactions on Computers
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
Microprocessing and Microprogramming
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
An early memory hierarchy evaluation simulator for multimedia applications
Microprocessors & Microsystems
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In this work we present a simulator for a multilevel cache memory system on a monoprocessor environment. It has incorporated a full graphic interface operating on a PC-DOS environment. At first, the simulator was conceived as a tool for applying it to teaching of cache memories. However, the potentiality of the developed system has proved its utility on program analysis and design strategies of memory systems. The above characteristics enable the simulator to be used for designing systems that run optimally a determinate kind of programs and improve the operating mode of a determinate architecture