Memory interfacing and instruction specification for reconfigurable processors

  • Authors:
  • Jeffrey A. Jacob;Paul Chow

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada M5S 3G4;Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada M5S 3G4

  • Venue:
  • FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
  • Year:
  • 1999

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Abstract