Quantifying academic placer performance on custom designs

  • Authors:

  • Samuel I. Ward;David A. Papa;Zhuo Li;Cliff N. Sze;Charles J. Alpert;Earl Swartzlander

  • Affiliations:

  • IBM Systesms and Technology Group, Austin, TX, USA;IBM Austin Research Laboratory, Austin, TX, USA;IBM Austin Research Laboratory, Austin, TX, USA;IBM Austin Research Laboratory, Austin, TX, USA;IBM Austin Research Laboratory, Austin, TX, USA;The University of Texas at Austin, Austin, TX, USA

  • Venue:
  • Proceedings of the 2011 international symposium on Physical design
  • Year:
  • 2011

Quantified Score

Hi-index 0.00

Visualization

Abstract

There have been significant prior efforts to quantify performance of academic placement algorithms, primarily by creating artificial test cases that attempt to mimic real designs, such as the PEKO benchmark containing known optimas [5]. The idea was to create benchmarks with a known optimal solution and then measure how far existing placers were from the known optimal. Since the benchmarks do not necessarily correspond to properties of real VLSI netlists, the conclusions were met with some skepticism. This work presents two custom constructed datapath designs that perform common logic functions with hand-designed layouts for each. The new generation of academic placers is then compared against them to see how the placers performed for these design styles. Experiments show that all academic placers have wirelengths significantly greater then the manual solution; solutions range from 1.75 to 4.88 times greater wirelengths. These testcases will be released publically to stimulate research into automatically solving structured datapath placement problems.