Floorplan repair using dynamic whitespace management
Proceedings of the 17th ACM Great Lakes symposium on VLSI
A high-quality mixed-size analytical placer considering preplaced blocks and density constraints
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
RQL: global placement via relaxed quadratic spreading and linearization
Proceedings of the 44th annual Design Automation Conference
The coming of age of physical synthesis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Highly efficient gradient computation for density-constrained analytical placement methods
Proceedings of the 2008 international symposium on Physical design
The ISPD global routing benchmark suite
Proceedings of the 2008 international symposium on Physical design
DPlace2.0: a stable and efficient analytical placement based on diffusion
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Solving modern mixed-size placement instances
Integration, the VLSI Journal
A multilevel analytical placement for 3D ICs
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A pre-placement net length estimation technique for mixed-size circuits
Proceedings of the 11th international workshop on System level interconnect prediction
Handling complexities in modern large-scale mixed-size placement
Proceedings of the 46th Annual Design Automation Conference
What makes a design difficult to route
Proceedings of the 19th international symposium on Physical design
SafeChoice: a novel clustering algorithm for wirelength-driven placement
Proceedings of the 19th international symposium on Physical design
A pre-placement individual net length estimation model and an application for modern circuits
Integration, the VLSI Journal
Quantifying academic placer performance on custom designs
Proceedings of the 2011 international symposium on Physical design
The ISPD-2011 routability-driven placement contest and benchmark suite
Proceedings of the 2011 international symposium on Physical design
StarPlace: A new analytic method for FPGA placement
Integration, the VLSI Journal
Unified analytical global placement for large-scale mixed-size circuit designs
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the 49th Annual Design Automation Conference
Structure-aware placement for datapath-intensive circuit designs
Proceedings of the 49th Annual Design Automation Conference
The DAC 2012 routability-driven placement contest and benchmark suite
Proceedings of the 49th Annual Design Automation Conference
ICCAD-2012 CAD contest in design hierarchy aware routability-driven placement and benchmark suite
Proceedings of the International Conference on Computer-Aided Design
ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement
Proceedings of the 2014 on International symposium on physical design
| Hi-index | 0.00 |
This talk introduces the new suite of ISPD 2006 placement benchmarks. These circuits are all directly derived from real industrial ASIC designs and represent today's mixed-size physical design constraints in terms of size and complexity. Compared to ISPD 2005 placement benchmarks, ISPD 2006 suite has more movable macros and the wider range of design utilizations. The ISPD 2006 Placement Contest is being held with these new benchmarks. This year, a more sophisticated scoring function will be deployed to measure the quality of placement solutions. The metric function takes into account HPWL (half-perimeter-bounding-box-wirelength), runtime and density target constraints. The purpose of adding runtime to the scoring function is to gently encourage faster placement performance. The purpose of the density target constraint is to encourage more routable placements. Further, this also allows more space for buffering, gate sizing and other synthesis transformations that might happen after the placement. Thus, this year's contest forces the placers to become more realistic than last year's, which focused solely on wirelength minimization. A total ten academic placement tools participated in the contest and the final results will be announced during this talk.