Evaluating Associativity in CPU Caches
IEEE Transactions on Computers
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
The integrated computer engineering design (ICED) curriculum
WCAE-4 '98 Proceedings of the 1998 workshop on Computer architecture education
The integrated computer engineering design (ICED) curriculum
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
WCAE '00 Proceedings of the 2000 workshop on Computer architecture education
A survey of web resources for teaching computer architecture
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
Teaching basics of instruction pipelining with HDLDLX
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
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We have built an interactive, visual pipeline simulator, called dlxview, for the DLX instruction set and pipeline described in Computer Architecture A Quantitative Approach by Hennessy and Patterson [1]. This software provides animated versions of key figures and tables from the text and allows the user to readily follow details of pipeline activity as a code is simulated, to vary pipeline implementation, and to compare performance across different pipeline designs. The software package requires a system running Unix and X11, with Tcl/Tk installed, and using the GNU gcc compiler is recommended. A 256 color display with 1024x768 pixels is best for display, due to the detailed diagrams of the DLX pipeline. The software has been designed to run on a variety of platforms and has been tested on Solaris 2.3, SunOS 4.1.1, HP-UX 9.0, DEC OSF/1 4.0, and Linux kernel 1.2.1. DLXview is available at http://yara.ecn.purdue.edu/~teamaaa/dlxview/