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ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Effective compiler support for predicated execution using the hyperblock
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Guarded execution and branch prediction in dynamic ILP processors
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Height reduction of control recurrences for ILP processors
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Characterizing the impact of predicated execution on branch prediction
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Register allocation for predicated code
Proceedings of the 28th annual international symposium on Microarchitecture
A comparison of full and partial predicated execution support for ILP processors
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
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Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Analysis techniques for predicated code
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
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MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
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Proceedings of the 25th annual international symposium on Computer architecture
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
The program decision logic approach to predicated execution
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
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Proceedings of the seventh ACM SIGPLAN symposium on Principles and practice of parallel programming
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Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Structured Computer Organization
Structured Computer Organization
The IA-64 Architecture at Work
Computer
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This paper presents a hybrid predication model in analogy to the delayed branching technique with overlapped delayed slots by integrating two different predication models. Predicated-execution is considered a promising branch handling technique. A few models have been proposed for predicated-execution, the most known model has succeeded to provide ILP processors with enough parallel instructions for efficient resources utilization. Unfortunately, false parallelism is introduced by the instructions provided from the nullified paths (large dynamic code expansion). Another predicatedexecution model has managed to decrease the dynamic code expansion, with the cost of limiting the parallelism exploited and increasing the static code expansion. The presented hybrid predication model managed to integrate the advantages of the two models by decreasing the code expansion both dynamically and statically, especially for conditional code structures included within loops. The various conducted experiments aimed to provide an evaluation for the proposed model via simulator. The results proved that the presented hybrid predication model can achieve better utilization of register and shorter schedules with the same issue-width compared with the other existing models.