Branch history table prediction of moving target branches due to subroutine returns
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Two-level adaptive training branch prediction
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
A comparison of dynamic branch predictors that use two levels of branch history
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Branch classification: a new mechanism for improving branch predictor performance
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
EEL: machine-independent executable editing
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Object-oriented programming in the BETA programming language
Object-oriented programming in the BETA programming language
Dynamic path-based branch correlation
Proceedings of the 28th annual international symposium on Microarchitecture
Alternative implementations of hybrid branch predictors
Proceedings of the 28th annual international symposium on Microarchitecture
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
The direct cost of virtual function calls in C++
Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Analysis of branch prediction via data compression
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Target prediction for indirect jumps
Proceedings of the 24th annual international symposium on Computer architecture
A language for describing predictors and its application to automatic synthesis
Proceedings of the 24th annual international symposium on Computer architecture
Accurate indirect branch prediction
Proceedings of the 25th annual international symposium on Computer architecture
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Branch Effect Reduction Techniques
Computer
Control Flow Speculation in Multiscalar Processors
HPCA '97 Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture
Improving Branch Prediction Accuracy by Reducing Pattern History Table Interference
PACT '96 Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques
Shade: A Fast Instruction Set Simulator for Execution Profiling
Shade: A Fast Instruction Set Simulator for Execution Profiling
Predicting indirect branches via data compression
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Improving virtual function call target prediction via dependence-based pre-computation
ICS '99 Proceedings of the 13th international conference on Supercomputing
The use of multithreading for exception handling
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Table size reduction for data value predictors by exploiting narrow width values
Proceedings of the 14th international conference on Supercomputing
Understanding the backward slices of performance degrading instructions
Proceedings of the 27th annual international symposium on Computer architecture
The impact of delay on the design of branch predictors
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Java Runtime Systems: Characterization and Architectural Implications
IEEE Transactions on Computers
Architectural and compiler support for effective instruction prefetching: a cooperative approach
ACM Transactions on Computer Systems (TOCS)
Execution-based prediction using speculative slices
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Design tradeoffs for the Alpha EV8 conditional branch predictor
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
An Exploration of Instruction Fetch Requirement in Out-of-Order Superscalar Processors
International Journal of Parallel Programming
Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
A Comprehensive Analysis of Indirect Branch Prediction
ISHPC '02 Proceedings of the 4th International Symposium on High Performance Computing
An Efficient Indirect Branch Predictor
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Multi-stage Cascaded Prediction
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Stress-testing Control Structures for Dynamic Dispatch in Java
Proceedings of the 2nd Java Virtual Machine Research and Technology Symposium
Reconsidering Complex Branch Predictors
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Partial Resolution in Data Value Predictors
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Proceedings of the 30th annual international symposium on Computer architecture
A low-complexity fetch architecture for high-performance superscalar processors
ACM Transactions on Architecture and Code Optimization (TACO)
Adapting branch-target buffer to improve the target predictability of java code
ACM Transactions on Architecture and Code Optimization (TACO)
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization
Proceedings of the 34th annual international symposium on Computer architecture
Speculative return address stack management revisited
ACM Transactions on Architecture and Code Optimization (TACO)
Phantom-BTB: a virtualized branch target buffer design
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Fetch Gating Control through Speculative Instruction Window Weighting
Transactions on High-Performance Embedded Architectures and Compilers II
Fetch gating control through speculative instruction window weighting
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
Managing SMT resource usage through speculative instruction window weighting
ACM Transactions on Architecture and Code Optimization (TACO)
Target encoding for efficient indirect jump prediction
Euro-Par'05 Proceedings of the 11th international Euro-Par conference on Parallel Processing
Compiler support for value-based indirect branch prediction
CC'12 Proceedings of the 21st international conference on Compiler Construction
CVP: an energy-efficient indirect branch prediction with compiler-guided value pattern
Proceedings of the 26th ACM international conference on Supercomputing
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