Two-level adaptive training branch prediction
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Alternative implementations of two-level adaptive branch prediction
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Improving the accuracy of dynamic branch prediction using branch correlation
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Predicting conditional branch directions from previous runs of a program
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
A comprehensive instruction fetch mechanism for a processor supporting speculative execution
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
A study of branch prediction strategies
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Increasing the instruction fetch rate via multiple branch prediction and a branch address cache
ICS '93 Proceedings of the 7th international conference on Supercomputing
Reducing indirect function call overhead in C++ programs
POPL '94 Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Improving semi-static branch prediction by code replication
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Fast and accurate instruction fetch and branch prediction
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
The impact of unresolved branches on branch prediction scheme performance
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Guarded execution and branch prediction in dynamic ILP processors
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Using branch handling hardware to support profile-driven optimization
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Branch classification: a new mechanism for improving branch predictor performance
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Minimizing branch misprediction penalties for superpipelined processors
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
The anatomy of the register file in a multiscalar processor
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
The effects of predicated execution on branch prediction
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Improving the accuracy of static branch prediction using branch correlation
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Reducing branch costs via branch alignment
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Corpus-based static branch prediction
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Performance evaluation of the PowerPC 620 microarchitecture
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A comparative analysis of schemes for correlated branch prediction
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Next cache line and set prediction
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Instruction cache fetch policies for speculative execution
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
The influence of branch prediction table interference on branch prediction scheme performance
PACT '95 Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques
Performance issues in correlated branch prediction schemes
Proceedings of the 28th annual international symposium on Microarchitecture
Dynamic path-based branch correlation
Proceedings of the 28th annual international symposium on Microarchitecture
A modified approach to data cache management
Proceedings of the 28th annual international symposium on Microarchitecture
Partial resolution in branch target buffers
Proceedings of the 28th annual international symposium on Microarchitecture
A system level perspective on branch architecture performance
Proceedings of the 28th annual international symposium on Microarchitecture
Alternative implementations of hybrid branch predictors
Proceedings of the 28th annual international symposium on Microarchitecture
The role of adaptivity in two-level adaptive branch prediction
Proceedings of the 28th annual international symposium on Microarchitecture
Disjoint eager execution: an optimal form of speculative execution
Proceedings of the 28th annual international symposium on Microarchitecture
A comparison of full and partial predicated execution support for ILP processors
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
An analysis of dynamic branch prediction schemes on system workloads
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Correlation and aliasing in dynamic branch predictors
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
High-bandwidth address translation for multiple-issue processors
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Analysis of branch prediction via data compression
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Evidence-based static branch prediction using machine learning
ACM Transactions on Programming Languages and Systems (TOPLAS)
Design decisions influencing the UltraSPARC's instruction fetch architecture
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Improving the Accuracy of History-Based Branch Prediction
IEEE Transactions on Computers
Control flow prediction for dynamic ILP processors
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Branch history table indexing to prevent pipeline bubbles in wide-issue superscalar processors
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Implementation and analysis of path history in dynamic branch prediction schemes
ICS '97 Proceedings of the 11th international conference on Supercomputing
Improving superscalar instruction dispatch and issue by exploiting dynamic code sequences
Proceedings of the 24th annual international symposium on Computer architecture
Target prediction for indirect jumps
Proceedings of the 24th annual international symposium on Computer architecture
Trading conflict and capacity aliasing in conditional branch predictors
Proceedings of the 24th annual international symposium on Computer architecture
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Predicting data cache misses in non-numeric applications through correlation profiling
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Partial Resolution in Branch Target Buffers
IEEE Transactions on Computers
Performance analysis on a CC-NUMA prototype
IBM Journal of Research and Development - Special issue: performance analysis and its impact on design
Multipath execution: opportunities and limits
ICS '98 Proceedings of the 12th international conference on Supercomputing
Dynamic history-length fitting: a third level of adaptivity for branch prediction
Proceedings of the 25th annual international symposium on Computer architecture
Accurate indirect branch prediction
Proceedings of the 25th annual international symposium on Computer architecture
Selective eager execution on the PolyPath architecture
Proceedings of the 25th annual international symposium on Computer architecture
25 years of the international symposia on Computer architecture (selected papers)
Implementation and Analysis of Path History in Dynamic Branch Prediction Schemes
IEEE Transactions on Computers
Using value prediction to increase the power of speculative execution hardware
ACM Transactions on Computer Systems (TOCS)
The YAGS branch prediction scheme
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
The cascaded predictor: economical and adaptive branch target prediction
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Improving prediction for procedure returns with return-address-stack repair mechanisms
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Predicting indirect branches via data compression
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Accelerating multi-media processing by implementing memoing in multiplication and division units
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Walk-Time Address Adjustment for Improving the Accuracy of Dynamic Branch Prediction
IEEE Transactions on Computers
Data threaded microarchitecture
ACM SIGARCH Computer Architecture News
Using dynamic cache management techniques to reduce energy in a high-performance processor
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Improving branch predictors by correlating on data values
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
IEEE Transactions on Computers
Static correlated branch prediction
ACM Transactions on Programming Languages and Systems (TOPLAS)
IEEE Transactions on Computers
Completion time multiple branch prediction for enhancing trace cache performance
Proceedings of the 27th annual international symposium on Computer architecture
Software profiling for hot path prediction: less is more
ACM SIGPLAN Notices
Java Runtime Systems: Characterization and Architectural Implications
IEEE Transactions on Computers
Software profiling for hot path prediction: less is more
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Automated design of finite state machine predictors for customized processors
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Cache decay: exploiting generational behavior to reduce cache leakage power
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Let caches decay: reducing leakage energy via exploitation of cache generational behavior
ACM Transactions on Computer Systems (TOCS)
Two cache lines prediction for a wide-issue micro-architecture
ACSAC '01 Proceedings of the 6th Australasian conference on Computer systems architecture
Skipper: a microarchitecture for exploiting control-flow independence
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Understanding and improving operating system effects in control flow prediction
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Optimal 2-Bit Branch Predictors
IEEE Transactions on Computers
Control-Flow Speculation through Value Prediction
IEEE Transactions on Computers
IEEE Transactions on Computers
Confidence Estimation for Branch Prediction Reversal
HiPC '01 Proceedings of the 8th International Conference on High Performance Computing
Studying New Ways for Improving Adaptive History Length Branch Predictors
ISHPC '02 Proceedings of the 4th International Symposium on High Performance Computing
An Efficient Indirect Branch Predictor
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Improving Conditional Branch Prediction on Speculative Multithreading Architectures
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Exploiting the Prefetching Effect Provided by Executing Mispredicted Load Instructions
Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
Cached Two-Level Adaptive Branch Predictors with Multiple Stages
ARCS '02 Proceedings of the International Conference on Architecture of Computing Systems: Trends in Network and Pervasive Computing
Exploiting data-width locality to increase superscalar execution bandwidth
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Predicate prediction for efficient out-of-order execution
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Representative Traces for Processor Models with Infinite Cache
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
TCP: Tag Correlating Prefetchers
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Dynamic Data Dependence Tracking and its Application to Branch Prediction
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Analysis of the Execution Time Unpredictability caused by Dynamic Branch Prediction
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Hybridizing and Coalescing Load Value Predictors
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
A Trace Based Evaluation of Speculative Branch Decoupling
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Two-level branch prediction using neural networks
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Alloyed branch history: combining global and local branch history for robust performance
International Journal of Parallel Programming
IEEE Transactions on Computers
Piecewise Linear Branch Prediction
Proceedings of the 32nd annual international symposium on Computer Architecture
Adapting branch-target buffer to improve the target predictability of java code
ACM Transactions on Architecture and Code Optimization (TACO)
Proceedings of the 10th European software engineering conference held jointly with 13th ACM SIGSOFT international symposium on Foundations of software engineering
Block-aware instruction set architecture
ACM Transactions on Architecture and Code Optimization (TACO)
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems
IEEE Transactions on Computers
Reducing Cache Pollution via Dynamic Data Prefetch Filtering
IEEE Transactions on Computers
A comparison of the effect of branch prediction on multithreaded and scalar architectures
ACM SIGARCH Computer Architecture News
Clustered indexing for branch predictors
Microprocessors & Microsystems
Evaluating the performance of dynamic branch prediction schemes with BPSim
WCAE-3 '97 Proceedings of the 1997 workshop on Computer architecture education
Accurate branch prediction for short threads
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
Generalizing neural branch prediction
ACM Transactions on Architecture and Code Optimization (TACO)
Creating artificial global history to improve branch prediction accuracy
Proceedings of the 23rd international conference on Supercomputing
Prediction in Dynamic SDRAM Controller Policies
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Evaluation of branch-prediction methods on traces from commercial applications
IBM Journal of Research and Development
POWER4 system microarchitecture
IBM Journal of Research and Development
Dynamic branch prediction and control speculation
International Journal of High Performance Systems Architecture
An input-centric paradigm for program dynamic optimizations
Proceedings of the ACM international conference on Object oriented programming systems languages and applications
Modeling program resource demand using inherent program characteristics
Proceedings of the ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Modeling program resource demand using inherent program characteristics
ACM SIGMETRICS Performance Evaluation Review - Performance evaluation review
Static techniques to improve power efficiency of branch predictors
HiPC'04 Proceedings of the 11th international conference on High Performance Computing
Energy-Effective instruction fetch unit for wide issue processors
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Design space exploration of hybrid ultra low power branch predictors
ARCS'12 Proceedings of the 25th international conference on Architecture of Computing Systems
Exploiting inter-sequence correlations for program behavior prediction
Proceedings of the ACM international conference on Object oriented programming systems languages and applications
Multiverse: efficiently supporting distributed high-level speculation
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
| Hi-index | 0.04 |
Recent attention to speculative execution as a mechanism for increasing performance of single instruction streams has demanded substantially better branch prediction than what has been previously available. We [1,2] and Pan, So, and Rahmen [4] have both proposed variations of the same aggressive dynamic branch predictor for handling those needs. We call the basic model Two-Level Adaptive Branch Prediction; Pan, So, and Rahmeh call it Correlation Branch Prediction. In this paper, we adopt the terminology of [2] and show that there are really nine variations of the same basic model. We compare the nine variations with respect to the amount of history information kept. We study the effects of different branch history lengths and pattern history table configurations. Finally, we evaluate the cost effectiveness of the nine variations.