Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
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Alternative implementations of two-level adaptive branch prediction
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ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
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MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
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MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
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A Systolic Array Optimizing Compiler
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ICS '01 Proceedings of the 15th international conference on Supercomputing
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Exploiting speculative value reuse using value prediction
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HiPC '01 Proceedings of the 8th International Conference on High Performance Computing
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This article presents an experimental and analytical study of value prediction and its impact on speculative execution in superscalar microprocessors. Value prediction is a new paradigm that suggests predicting outcome values of operations (at run-time ) and using these predicted values to trigger the execution of true-data-dependent operations speculatively. As a result, stals to memory locations can be reduced and the amount of instruction-level parallelism can be extended beyond the limits of the program's dataflow graph. This article examines the characteristics of the value prediction concept from two perspectives: (1) the related phenomena that are reflected in the nature of computer programs and (2) the significance of these phenomena to boosting instruction-level parallelism of superscalar microprocessors that support speculative execution. In order to better understand these characteristics, our work combines both analytical and experimental studies.