Architecture and compiler tradeoffs for a long instruction wordprocessor
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Parallel compilation for a parallel machine
PLDI '89 Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Software pipelining for transport-triggered architectures
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Using Lookahead to reduce memory bank contention for decoupled operand references
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
MOVE: a framework for high-performance processor design
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
A semantics-directed partitioning of a processor architecture
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
Lifetime-sensitive modulo scheduling
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
The NuMesh: a modular, scalable communications substrate
ICS '93 Proceedings of the 7th international conference on Supercomputing
Hypernode reduction modulo scheduling
Proceedings of the 28th annual international symposium on Microarchitecture
Software pipelining showdown: optimal vs. heuristic methods in a production compiler
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Heuristics for register-constrained software pipelining
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
High-level microprogramming: an optimizing C compiler for a processing element of a CAD accelerator
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Modulo Scheduling with Reduced Register Pressure
IEEE Transactions on Computers
Retrospective: a retrospective on the Warp machines
25 years of the international symposia on Computer architecture (selected papers)
Quantitative Evaluation of Register Pressure on Software Pipelined Loops
International Journal of Parallel Programming
Using value prediction to increase the power of speculative execution hardware
ACM Transactions on Computer Systems (TOCS)
Improved spill code generation for software pipelined loops
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Lifetime-Sensitive Modulo Scheduling in a Production Environment
IEEE Transactions on Computers
FDRA: a software-pipelining algorithm for embedded VLIW processors
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Systolic Opportunities for Multidimensional Data Streams
IEEE Transactions on Parallel and Distributed Systems
Register Constrained Modulo Scheduling
IEEE Transactions on Parallel and Distributed Systems
Allocating architected registers through differential encoding
ACM Transactions on Programming Languages and Systems (TOPLAS)
Compilation for explicitly managed memory hierarchies
Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming
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