Journal of the ACM (JACM)
Parallel Program Schemata and Maximal Parallelism II: Construction of Closures
Journal of the ACM (JACM)
Some effects of the 6600 computer on language structures
Communications of the ACM
Configurable computers: a new class of general purpose machines
Proceedings of the International Sympoisum on Theoretical Programming
Polynomial complete scheduling problems
SOSP '73 Proceedings of the fourth ACM symposium on Operating system principles
Proceedings of the conference on Programming languages and compilers for parallel and vector machines
Design of a Computer—The Control Data 6600
Design of a Computer—The Control Data 6600
Planning a computer system: Project Stretch
Planning a computer system: Project Stretch
An Instruction Issuing Approach to Enhancing Performance in Multiple Functional Unit Processors
IEEE Transactions on Computers
HPSm, a high performance restricted data flow architecture having minimal functionality
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
HPS, a new microarchitecture: rationale and introduction
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Checkpoint repair for out-of-order execution machines
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Checkpoint repair for high-performance out-of-order execution machines
IEEE Transactions on Computers
Theory of Clocking for Maximum Execution Overlap of High-Speed Digital Systems
IEEE Transactions on Computers
On the combination of hardware and software concurrency extraction methods
ACM SIGMICRO Newsletter
I-NET mechanism for issuing multiple instructions
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Limits on multiple instruction issue
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
IEEE Transactions on Computers
Exploiting fine-grained parallelism through a combination of hardware and software techniques
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Hiding memory latency using dynamic scheduling in shared-memory multiprocessors
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Effects of building blocks on the performance of super-scalar architecture
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Efficient superscalar performance through boosting
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Interlock collapsing ALU for increased instruction-level parallelism
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
An out-of-order superscalar processor with speculative execution and fast, precise interrupts
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Enhanced superscalar hardware: the schedule table
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Exploiting short-lived variables in superscalar processors
Proceedings of the 28th annual international symposium on Microarchitecture
A comparision of superscalar and decoupled access/execute architectures
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Register renaming and dynamic speculation: an alternative approach
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
On the combination of hardware and software concurrency extraction methods
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Exploiting instruction level parallelism in processors by caching scheduled groups
Proceedings of the 24th annual international symposium on Computer architecture
Analysis and evaluation of address arithmetic capabilities in custom DSP architectures
DAC '97 Proceedings of the 34th annual Design Automation Conference
Improving the accuracy and performance of memory communication through renaming
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
25 years of the international symposia on Computer architecture (selected papers)
Using value prediction to increase the power of speculative execution hardware
ACM Transactions on Computer Systems (TOCS)
MICRO 31 Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
Synthesis of optimal clocking schemes
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Renamings, Maximal Parallelism, and Space-Time Tradeoff in Program Schemata
Journal of the ACM (JACM)
Boosting beyond static scheduling in a superscalar processor
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Memory Renaming: Fast, Early and Accurate Processing of Memory Communication
International Journal of Parallel Programming
A Buffer-Oriented Methodology for Microarchitecture Validation
Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification
ACM Computing Surveys (CSUR)
Evaluating the Use of Register Queues in Software Pipelined Loops
IEEE Transactions on Computers - Special issue on the parallel architecture and compilation techniques conference
IEEE Micro
IEEE Micro
Interrupt Handling for Out-of-Order Execution Processors
IEEE Transactions on Computers
An Accurate Worst Case Timing Analysis for RISC Processors
IEEE Transactions on Software Engineering
An adaptive multimicroprocessor array computing structure for radar signal processing applications
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Performance enhancement of SISD processors
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
A language implementation design for a multiprocessor computer system
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Proposal For A Shared Resource Computing Utility
ACM '78 Proceedings of the 1978 annual conference
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Performance Study of a Multithreaded Superscalar Microprocessor
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Input/Output considerations in look-ahead processing
ACM SIGARCH Computer Architecture News
Late Allocation and Early Release of Physical Registers
IEEE Transactions on Computers
The Expression Processor: A Pipelined, Multiple- Processor Architecture
IEEE Transactions on Computers
Hardware support for early register release
International Journal of High Performance Computing and Networking
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