ACM Computing Surveys (CSUR)
ACM Computing Surveys (CSUR)
Functional memory techniques applied to the microprogrammed control of an associative processor
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
The Serial Microprocessor Array (SMA): Microprogramming and application examples
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
The minerva multi-microprocessor
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
A multimicroprocessor approach to numerical analysis: An application to gaming problems
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
Improving the throughput of a pipeline by insertion of delays
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
A Large Scale, Homogenous, Fully Distributed Parallel Machine, II
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
An introduction to network computers
ACM '82 Proceedings of the ACM '82 conference
PUMPS Architecture for Pattern Analysis and Image Database Management
IEEE Transactions on Computers
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This paper describes an array processor designed for signal processing in radar applications. The processor consists of a large number of microprocessor-based processing elements and is designed to be adaptive in real-time processing requirements. The processing problem has been considered to have a quite specific data organization and data rate which can be exploited in the architectural design. Parallel processing is necessary and a pipelined approach was adopted. A generalized pipeline philosophy is described which leads to a description of the hardware structure. The development of a single level control structure with separate generation of opcodes and addresses is noted.