Design techniques for high performance, energy efficient control logic

Authors:
Uming Ko;Anthony Hill;Poras T. Balsara
Affiliations:
Texas Instruments Incorporated, P. O. Box 660199, M/S 8652, Dallas, TX;Texas Instruments Incorporated, P. O. Box 660199, M/S 8652, Dallas, TX;Department of Electrical Engineering, Univ. of Texas at Dallas, P. O. Box 830668, EC33, Richardson, TX
Venue:
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Year:
1996

Citing 2
Cited 2

Low-power design techniques for high-performance CMOS adders

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Computer architecture (2nd ed.): a quantitative approach

Computer architecture (2nd ed.): a quantitative approach

Hybrid dual-threshold design techniques for high-performance processors with low-power features

ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
A unified approach in the analysis of latches and flip-flops for low-power systems

ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design

Quantified Score

Hi-index	0.01

Visualization

Abstract