Design Issues in Division and Other Floating-Point Operations
IEEE Transactions on Computers
AMULET1: An Asynchronous ARM Microprocessor
IEEE Transactions on Computers
Semi-Logarithmic Number Systems
IEEE Transactions on Computers
Optimal Circuits for Parallel Multipliers
IEEE Transactions on Computers
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Computer
Statistical Carry Lookahead Adders
IEEE Transactions on Computers
FPGA implementation of real-time digital controllers using on-line arithmetic
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
UltraSPARC: Compiling for Maximum Floating Point Performance
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
| Hi-index | 5.23 |
This paper discusses the relationship between computer arithmetic and hardware implementation. First, we examine the impact of computer arithmetic on the overall performance of today's microprocessors. By comparing their evolution over the last 10 years, we show that the performance of arithmetic operators is far less critical than the performance of the memory hierarchy or the branch predictors. We then discuss the potential for improvement in arithmetic performance, both for pipelined and non-pipelined operations. We then examine the possible impact of new technologies, such as MMX technology or asynchronous control of microprocessors, on computer arithmetic. Finally, we show that programmable logic devices now permit a cost-effective implementation of specific arithmetic number representations, such as serial arithmetic or logarithmic representations.