The iPSC/2 direct-connect communications technology
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
On the design of deadlock-free adaptive routing algorithms for multicomputers: design methodologies
PARLE '91 Proceedings on Parallel architectures and languages Europe : volume I: parallel architectures and algorithms: volume I: parallel architectures and algorithms
Data and computer communications (5th ed.)
Data and computer communications (5th ed.)
PP-MESS-SIM: A Flexible and Extensible Simulator for Evaluating Multicomputer Networks
IEEE Transactions on Parallel and Distributed Systems
A Cost and Speed Model for k-ary n-Cube Wormhole Routers
IEEE Transactions on Parallel and Distributed Systems
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
A General Theory for Deadlock Avoidance in Wormhole-Routed Networks
IEEE Transactions on Parallel and Distributed Systems
A Router Architecture for Flexible Routing and Switching in Multihop Point-To-Point Networks
IEEE Transactions on Parallel and Distributed Systems
Problems with Comparing Interconnection Networks: Is an Alligator Better Than an Armadillo?
IEEE Parallel & Distributed Technology: Systems & Technology
IEEE Transactions on Parallel and Distributed Systems
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
IEEE Transactions on Computers
Hardware for multiconnected networks: a case study
Information Sciences—Informatics and Computer Science: An International Journal - Special issue: Informatics and computer science intelligent systems applications
Hi-index | 0.00 |
This paper presents an architectural study that may be used to design and develop a general, efficient hardware for multiconnected networks. Starting from the constraints, the proposed design flow allows an accurate evaluation of cost and performance of the final implementation. The generality of the architecture permits the realization of networks with practically any size or topologies.