A VLSI architecture for concurrent data structures
A VLSI architecture for concurrent data structures
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Cantor User Report: Version 2.0
Cantor User Report: Version 2.0
VLSI Mesh Routing Systems
iPSC/2 system: a second generation hypercube
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
Application performance improvement on the iPSC/2 computer
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
A distributed hypercube file system
C3P Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Constructing Parallel Paths Between Two Subcubes
IEEE Transactions on Computers
A tightly-coupled processor-network interface
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Supporting sets of arbitrary connections on iWarp through communication context switches
SPAA '93 Proceedings of the fifth annual ACM symposium on Parallel algorithms and architectures
Implementing the NHT-1 application I/O benchmark
ACM SIGARCH Computer Architecture News - Special issue on input/output in parallel computer systems
Dynamic Load Balancing in Very Large Shared-Nothing Hypercube Database Computers
IEEE Transactions on Computers
Virtual memory mapped network interface for the SHRIMP multicomputer
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
An Interface to a Reliable Packet Delivery Service for Parallel Systems
IEEE Transactions on Parallel and Distributed Systems
Embedding and Reconfiguration of Binary Trees in Faulty Hypercubes
IEEE Transactions on Parallel and Distributed Systems
Circuit-Switched Broadcasting in Torus Networks
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Highly Scalable Parallel Algorithms for Sparse Matrix Factorization
IEEE Transactions on Parallel and Distributed Systems
All-To-All Broadcast and Matrix Multiplication in Faulty SIMD Hypercubes
IEEE Transactions on Parallel and Distributed Systems
A Priority-Driven Flow Control Mechanism for Real-Time Traffic in Multiprocessor Networks
IEEE Transactions on Parallel and Distributed Systems
Virtual memory mapped network interface for the SHRIMP multicomputer
25 years of the international symposia on Computer architecture (selected papers)
Parallel algorithms for solution of tridiagonal systems on multicomputers
ICS '89 Proceedings of the 3rd international conference on Supercomputing
A Performance Model for Duato's Fully Adaptive Routing Algorithm in k$k$-Ary n$n$-Cubes
IEEE Transactions on Computers
Distributed Path Reservation Algorithms for Multiplexed All-Optical Interconnection Networks
IEEE Transactions on Computers
An Analytical Model of Adaptive Wormhole Routing in Hypercubes in the Presence of Hot Spot Traffic
IEEE Transactions on Parallel and Distributed Systems
Analytical Modeling of Wormhole-Routed k-Ary n-Cubes in the Presence of Hot-Spot Traffic
IEEE Transactions on Computers
Broadcast communication delay metric for the iPSC/2 and iPSC/860 hypercubes
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
Probability vectors: a new fault-tolerant routing algorithm for k-ary n-cubes
Proceedings of the 2002 ACM symposium on Applied computing
On the Performance of Parallel Matrix Factorisation on the Hypermesh
The Journal of Supercomputing
Circuit-Switched Broadcasting in Multi-Port Multi-Dimensional Torus Networks
The Journal of Supercomputing
The Journal of Supercomputing
A Comparative Study of Switching Methods in Multicomputer Networks
The Journal of Supercomputing
On the merits of hypermeshes and tori with adaptive routing
Journal of Systems Architecture: the EUROMICRO Journal
A Fault-Tolerant Communication Scheme for Hypercube Computers
IEEE Transactions on Computers
Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults
IEEE Transactions on Computers
Free Dimensions-An Effective Approach to Achieving Fault Tolerance in Hypercubes
IEEE Transactions on Computers
Eliminating Memory for Fragmentation Within Partitionable SIMD/SPMD Machines
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Data Management and Control-Flow Aspects of an SIMD/SPMD Parallel Language/Compiler
IEEE Transactions on Parallel and Distributed Systems
Balanced Parallel Sort on Hypercube Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Multicast Communication in Multicomputer Networks
IEEE Transactions on Parallel and Distributed Systems
Communication Aspects of the Star Graph Interconnection Network
IEEE Transactions on Parallel and Distributed Systems
Join and Data Redistribution Algorithms for Hypercubes
IEEE Transactions on Knowledge and Data Engineering
Optimal Subcube Fault Tolerance in a Circuit-Switched Hypercube
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
An Experimental Assessment of Express Parallel Programming Environment
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
A Parallel Algorithm for Lagrange Interpolation on k-ary n-Cubes
ParNum '99 Proceedings of the 4th International ACPC Conference Including Special Tracks on Parallel Numerics and Parallel Computing in Image Processing, Video Processing, and Multimedia: Parallel Computation
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
A Performance Model of Adaptive Routing in k-Ary n-Cubes with Matrix-Transpose Traffic
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Analytical modelling of wormhole-routed k-ary n-cubes in the presence of matrix-transpose traffic
Journal of Parallel and Distributed Computing
An analytical model of wormhole-routed hypercubes under broadcast traffic
Performance Evaluation
Modeling Latency in Deterministic Wormhole-Routed Hypercubes under Hot-Spot Traffic
The Journal of Supercomputing
Hardware for multiconnected networks: the design flow
Information Sciences—Informatics and Computer Science: An International Journal - Special issue: Informatics and computer science intelligent systems applications
Optical transpose k-ary n-cube networks
Journal of Systems Architecture: the EUROMICRO Journal
Comparative Modeling of Network Topologies and Routing Strategies in Multicomputers
International Journal of High Performance Computing Applications
Performance Modelling and Analysis of Pipelined Circuit Switching in Hypercubes with Faults
HPCASIA '05 Proceedings of the Eighth International Conference on High-Performance Computing in Asia-Pacific Region
Switch fabric design for high performance IP routers: a survey
Journal of Systems Architecture: the EUROMICRO Journal
A performance model of compressionless routing in k-ary n-cube networks
Performance Evaluation
Communication delay analysis of fault-tolerant pipelined circuit switching in torus
Journal of Computer and System Sciences
Performance modelling of pipelined circuit switching in hypercubes with hot spot traffic
Microprocessors & Microsystems
A two-stage hardware scheduler combining greedy and optimal scheduling
Journal of Parallel and Distributed Computing
Paper: Performance of the Intel iPSC/860 and Ncube 6400 hypercubes
Parallel Computing
Microprocessors & Microsystems
Fault-tolerant edge-pancyclicity of locally twisted cubes
Information Sciences: an International Journal
Enhanced OTIS k-ary n-cube networks
ICDCIT'06 Proceedings of the Third international conference on Distributed Computing and Internet Technology
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This paper describes the hardware architecture and protocol of the message routing system used in the iPSC®/2 concurrent computer. The Direct-Connect router was developed by Intel Scientific Computers to replace the store-and-forward message passing mechanism used in the original iPSC system. The router enhances the performance of the iPSC/2 system by reducing the message passing latency, increasing the node-to-node channel bandwidth and allowing simultaneous bi-directional message traffic between any two nodes. The new communication system has nearly equal performance between any pair of processing nodes, making the network topology more transparent to the user.The Direct-Connect router is a specialized self-contained hardware module attached to each hypercube node. The router is implemented in CMOS programmable gate-arrays with advanced CMOS buffering. Routers are connected by full-duplex bit-serial channels to form a Boolean n-cube network. The router also provides a high performance interface between the node memory bus and the network.