The connection machine
Mathematical structures for computer science (2nd ed.)
Mathematical structures for computer science (2nd ed.)
Parallel computing: theory and comparisons
Parallel computing: theory and comparisons
Proceedings of the international workshop on Parallel algorithms & architectures
Experience using a SIMD/SPMD multiprocessor architecture
Microprocessing and Microprogramming
The iPSC/2 direct-connect communications technology
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
Journal of Parallel and Distributed Computing
Interconnection networks for large-scale parallel processing: theory and case studies (2nd ed.)
Interconnection networks for large-scale parallel processing: theory and case studies (2nd ed.)
Experimental analysis of a mixed-mode parallel architecture using bitonic sequence sorting
Journal of Parallel and Distributed Computing
Data Structures and Algorithms
Data Structures and Algorithms
Discrete Mathematics in Computer Science
Discrete Mathematics in Computer Science
Experimental Application-Driven Architecture Analysis of an SIMD/MIMD Parallel Processing System
IEEE Transactions on Parallel and Distributed Systems
Data Management and Control-Flow Aspects of an SIMD/SPMD Parallel Language/Compiler
IEEE Transactions on Parallel and Distributed Systems
Microprocessor implementation of a parallel processor
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
Data Management and Control-Flow Aspects of an SIMD/SPMD Parallel Language/Compiler
IEEE Transactions on Parallel and Distributed Systems
FEBA: a bandwidth allocation algorithm for service differentiation in IEEE 802.16 mesh networks
IEEE/ACM Transactions on Networking (TON)
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Efficient data layout is an important aspect of the compilation process. A model for the creation of perfect memory maps for large-scale parallel machines capable ofuser-controlled partitionable single-instruction-multiple data/single-program-multiple data (SIMD/SPMD) operation is developed. The term perfect implies that no memory fragmentation occurs and ensures that the memory map size is kept to a minimum. A major constraint on solving this problem is based on the single program nature of both the SIMD and SPMD modes of parallelism. It is assumed that all processors within the same submachine used identical addresses to access corresponding data items in each of their local memories. Necessary and sufficient conditions are derived for being able to create perfect memory maps, and results are applied to several partitionable interconnection networks.