Application performance improvement on the iPSC/2 computer

  • Authors:

  • S. Arshi;R. Asbury;J. Brandenburg;D. Scott

  • Affiliations:

  • Intel Scientific Computers;Intel Scientific Computers;Intel Scientific Computers;Intel Scientific Computers

  • Venue:
  • C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
  • Year:
  • 1988

  • The iPSC/2 node architecture

    C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1

  • The iPSC/2 direct-connect communications technology

    C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1

  • The NX/2 operating system

    C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1

  • Environment for enhancing iPSC/2 programmer productivity

    C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1

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Abstract

The performance of concurrent computers depends fundamentally on the capabilities of the individual processing nodes and the characteristics of the interprocessor communication system. The Intel iPSC®/2 is significantly better in both categories than the original iPSC (iPSC/1). This paper will briefly compare the hardware of the two machines and then discuss the actual measured performance improvement of several kernels of application codes. The improvements vary from a factor of two and a half to more than a factor of 30.