Two-level adaptive training branch prediction
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Disjoint eager execution: an optimal form of speculative execution
Proceedings of the 28th annual international symposium on Microarchitecture
Ideograph/Ideogram: framework/hardware for eager evaluation
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Computer organization and design (2nd ed.): the hardware/software interface
Computer organization and design (2nd ed.): the hardware/software interface
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Finite State Markovian Decision Processes
Finite State Markovian Decision Processes
Performance Characterization of the Pentium® Pro Processor
HPCA '97 Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture
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Speculative execution of code is becoming a key technique for enhancing the performance of pipeline processors. In this work we study schemes that predict the execution path of a program based on the history of branch executions. Building on previous work, we present a model for analyzing the effective speedup from pipelining, when speculative execution is employed. We follow this with stochastic analyses of several schemes for speculative execution.A main result of our study is that if we can predict branch resolution with high probability (as in the Pentium Pro processor, e.g.) the Single Path scheme commonly used on modern processors is within factor of 2 from the optimal. We conclude with simulations covering several of the settings that we study.