A New Organization for a Perceptron-Based Branch Predictor and Its FPGA Implementation

Authors:
Oswaldo Cadenas;Graham Megson;Daniel Jones
Affiliations:
University of Reading;University of Reading;University of Reading
Venue:
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Year:
2005

Citing 2
Cited 0

Neural methods for dynamic branch prediction

ACM Transactions on Computer Systems (TOCS)
Dynamic Branch Prediction with Perceptrons

HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture

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Abstract

An unaltered rearrangement of the original computation of a neural based predictor at the algorithmic level is introduced as a new organization. Its FPGA implementation generates circuits that are 1.7 faster than a direct implementation of the original algorithm. This faster clock rate allows to implement predictors with longer history lengths using the nearly the same hardware budget.