Technology Trends and Adaptive Computing
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
An Augmented Iterative Array for High-Speed Binary Division
IEEE Transactions on Computers
Minimum Mean Running Time Function Generation Using Read-Only Memory
IEEE Transactions on Computers
Cellular Logic Array for High-Speed Signed Binary Number Multiplication
IEEE Transactions on Computers
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A family of four procedures to compute the inverse 1/X of a given binary number X normalized between 0.5 and 1 is described. The quotient is obtained in redundant binary form, i.e., in a base 2 code in which digits can assume any positive or negative integer value. All methods here described can be implemented by combinatorial networks; the dividers realized in this way are very fast because all carry propagations take place at the same time.