Digital Signal Processing; Theory, Design, and Implementation
Digital Signal Processing; Theory, Design, and Implementation
IEEE Transactions on Computers
An Algorithm for High-Speed Digital Filters
IEEE Transactions on Computers
A Microprogrammed Approach to Signal Processing
IEEE Transactions on Computers
The LX-1 Microprocessor and Its Application to Real-Time Signal Processing
IEEE Transactions on Computers
A Special-Purpose Computer for Digital Signal Processing
IEEE Transactions on Computers
Architectural considerations of a signal processor under microprogram control
AFIPS '72 (Spring) Proceedings of the May 16-18, 1972, spring joint computer conference
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This paper describes a general-purpose digital-signal processor which is constructed with 4 bit bipolar microprocessor slices. The signal processor is microprogrammable and contains special features which allow it to employ distributed arithmetic. Hence, the processor can achieve high sampling rates without using a hardware multiplier unit. The processor's architecture is presented and its micro-order structure is examined. The processor wordlength is 16 bit; its basic cycle time, 300 ns; its data memory size, 2K words; its control store size, 256 脳 56 bits. It consumes 48 W of power and has special address processing hardware. Experimental results with a twelfth-order digital filter are demonstrated. The signal processor is also compared with several other signal processors of its class described in the literature.