An Algorithm for High-Speed Digital Filters

  • Authors:
  • W. D. Little

  • Affiliations:
  • Department of Electrical Engineering, University of Waterloo

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1974

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Abstract

This paper describes an algorithm that is suitable for fast implementations of nonrecursive and recursive digital filters. High speed is realized at the expense of memory; however, the memory-speed tradeoff is flexible so that many hardware and software implementations are practical. When memory is not limited, the time required to compute a filter output value is independent of the order of the filter.