A Digital Quarter Square Multiplier

Authors:
E. L. Johnson
Affiliations:
Department of Electrical Engineering, Wichita State University
Venue:
IEEE Transactions on Computers
Year:
1980

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Abstract

An application of the quarter square multiplication technique used in analog computing is proposed for digital multiplication. Significant savings in storage requirements for ROM- implemented product tables are demonstrated. A two's complement multiplication circuit utilizing the digital quarter square technique is presented.