Experimental personalized array translator system
Communications of the ACM
An interpreter for "Iverson notation"
An interpreter for "Iverson notation"
A programming language
The hardware-implemented high-level machine language for SYMBOL
AFIPS '71 (Spring) Proceedings of the May 18-20, 1971, spring joint computer conference
Interconnection networks: a survey and assessment
AFIPS '74 Proceedings of the May 6-10, 1974, national computer conference and exposition
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A system design is given for a computer capable of efficient execution of APL source statements and programs. The system is organized in a new type computer architecture based upon the storage of matrices and vectors in cellular logic arrays. Almost all of the scalar, mixed, and composite fixed point APL operations are implemented on the machine by algorithms given in this paper. The detailed logical design of the machine has not been completed; however, all the needed logic and memory has been specified. Also, the functions that each hardware cell must be able to perform have been specified. The algorithms for most APL operations are presented in flow charts or tables which give the detailed data flow produced by the execution of each APL operation in the machine.