Design of Two-Level Fault-Tolerant Networks
IEEE Transactions on Computers
Design of Asynchronous Sequential Networks Using Read-Only Memories
IEEE Transactions on Computers
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design
IEEE Transactions on Computers
Universal Single Transition Time Asynchronous State Assignments
IEEE Transactions on Computers
IEEE Transactions on Computers
Fault-Tolerant Asynchronous Sequential Machines
IEEE Transactions on Computers
IEEE Transactions on Computers
Fault Tolerant Sequential Machines
IEEE Transactions on Computers
Asynchronous sequential circuits with (2, 1) type state assignments
SWAT '70 Proceedings of the 11th Annual Symposium on Switching and Automata Theory (swat 1970)
Fault-Tolerant Asynchronous Networks
IEEE Transactions on Computers
Asynchronous State Assignments with Unateness Properties and Fault-Secure Design
IEEE Transactions on Computers
| Hi-index | 14.98 |
In this paper, we present techniques for the construction of certain redundant state assignments suitable for fault-tolerant asynchronous network design. These assignments have certain characteristics that make them well-suited for error-control in asynchronous networks, using read-only memories, and are as follows: only a small number of additional state variables are required for incorporating fault-tolerance properties; the assignments form the codewords of an error-correcting code; and are systematic. An example is also provided to clarify some misconceptions that have arisen over the fault-tolerant design proposed earlier by the authors