Heuristic Minimization of MVL Functions: A Direct Cover Approach
IEEE Transactions on Computers
Current-Mode CMOS Multiple-Valued Logic Function Realization Using a Direct Cover Algorithm
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
IEEE Transactions on Computers
The Prospects for Multivalued Logic: A Technology and Applications View
IEEE Transactions on Computers
Synthesis of Discrete Functions Using I2L Technology
IEEE Transactions on Computers
On the Design of 4-Valued Digital Systems
IEEE Transactions on Computers
Representation of Multivalued Functions Using the Direct Cover Method
IEEE Transactions on Computers
The Complexity of Computational Circuits Versus Radix
IEEE Transactions on Computers
A Stochastic Dynamic Local Search Method for Learning Multiple-Valued Logic Networks
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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An algebraic system for designing multivalued (four-level) I2L circuits is presented here. It was necessary to develop this system because the use of existing multivalued logic formalisms does not result in efficient I2L circuits. The close relationship between the algebra and the integrated circuits is stressed throughout the paper.