A Synthesis Technique for Binary Input-Binary Output Synchronous Sequential Moore Machines
IEEE Transactions on Computers
Uniform Decomposition of Incompletely Specified Sequential Machines
IEEE Transactions on Computers
Delayed Universal Logic Modules and Sequential Machine Synthesis
IEEE Transactions on Computers
Iteratively Realized Sequential Circuits
IEEE Transactions on Computers
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Universal logic modules of n variables (ULM-n) can be used to synthesize sequential machines. It has been shown that any machine can be realized using delayed ULM's and OR gates. Addition of an n -to-2n decoder allows minimization of the number of ULM's necessary.