Test Sets for Combinational Logic The Edge-Tracing Approach
IEEE Transactions on Computers
Minimal Fault Tests for Redundant Combinational Networks
IEEE Transactions on Computers
Hi-index | 14.99 |
Techniques for deriving the minimum length tests are developed for irredundant combinational circuits that contain single faults. The development is based on the Boolean difference function. The Boolean difference function is expanded to form two analytical expressions that can be used to calculate the tests for any stuck-at-zero and stuck-at-one fault within combinational circuits.