Communications of the ACM
An environment for research in microprogramming and emulation
Communications of the ACM
Communications of the ACM
A programmer's description of L6
Communications of the ACM
Advances in Computer Architecture
Advances in Computer Architecture
High Performance Hardware for Database Systems
Systems for Large Data Bases
Microprogrammed implementation of a single chip microprocessor
MICRO 11 Proceedings of the 11th annual workshop on Microprogramming
The MPG System: A Machine-Independent Efficient Microprogram Generator
IEEE Transactions on Computers
Hardware Algorithms for Nonnumeric Computation
IEEE Transactions on Computers
A Dynamically Microprogrammable Computer with Low-Level Parallelism
IEEE Transactions on Computers
An Introduction to the Direct Emulation of Control Structures by a Parallel Microcomputer
IEEE Transactions on Computers
The Effects-of Emerging Technology and Emulation Requirements on Microprogramming
IEEE Transactions on Computers
The Logic Machine: A Modular Computer Design System
IEEE Transactions on Computers
A Research-Oriented Dynamic Microprocessor
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
Computer instruction repertoire: time for a change
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
The interpreter: a microprogrammable building block system
AFIPS '72 (Spring) Proceedings of the May 16-18, 1972, spring joint computer conference
A Shuffle-Exchange Network with Simplified Control
IEEE Transactions on Computers
Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis
IEEE Transactions on Computers
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A two-level microprogrammed multiprocessor system, MUNAP, along with its support software has been developed as a research vehicle for solving nonnumeric and associated problems. The MUNAP system provides highly parallel and distributed functions for nonnumeric processing, such as variable length word addressing, data permutation at the microprogram level, and bit operation and field handling at the multinanoprogram level. To control these functions efficiently, a 28-bit microinstruction simultaneously drives several nanoprogram streams of 40-bit nanoinstructions in the four 16-bit processor units. This scheme not only provides the ability to organize a number of modular processing elements into a single, parallel processable computer system, but also allows MUNAP to change its architecture at the firmware level.