Perturbation-based Fault Screening

  • Authors:

  • Paul Racunas;Kypros Constantinides;Srilatha Manne;Shubhendu S. Mukherjee

  • Affiliations:

  • FACT Group, Intel Corp., Hudson, MA 01749;Dept. of Computer Science and Engineering, University of Michigan, Ann Arbor, MI 48105;ITPP Group, Intel Corp., DuPont, WA 98327;FACT Group, Intel Corp., Hudson, MA 01749

  • Venue:
  • HPCA '07 Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture
  • Year:
  • 2007

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Abstract

Fault screeners are a new breed of fault identification technique that can probabilistically detect if a transient fault has affected the state of a processor. We demonstrate that fault screeners function because of two key characteristics. First, we show that much of the intermediate data generated by a program inherently falls within certain consistent bounds. Second, we observe that these bounds are often violated by the introduction of a fault. Thus, fault screeners can identify faults by directly watching for any data inconsistencies arising in an application's behavior. We present an idealized algorithm capable of identifying over 85% of injected faults on the SpecInt suite and over 75% overall. Further, in a realistic implementation on a simulated Pentium-III-like processor, about half of the errors due to injected faults are identified while still in speculative state. Errors detected this early can be eliminated by a pipeline flush. In this paper, we present several hardware-based versions of this screening algorithm and show that flushing the pipeline every time the hardware screener triggers reduces overall performance by less than 1%