A 10Gbps/channel On-Chip Signaling Circuit with an Impedance-Unmatched CML Driver in 90nm CMOS Technology

Authors:
T. Kuboki;A. Tsuchiya;H. Onodera
Affiliations:
Dept. of Commun.&Comput. Eng., Kyoto Univ.;Dept. of Commun.&Comput. Eng., Kyoto Univ.;Dept. of Commun.&Comput. Eng., Kyoto Univ.
Venue:
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Year:
2007

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Semi-serial on-chip link implementation for energy efficiency and high throughput

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

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Abstract

An on-chip signaling system consists of a CML driver, a differential transmission-line and a CML receiver is fabricated. We developed an impedance-unmatched driver for power reduction. The impedance-unmatched driver reduces the tail current of the CML buffer by tuning the load resistance. The designed circuit achieves 3mm, 10Gbps/channel on-chip signal transmission and the impedance-unmatched driver saves the energy per bit by 21% compared with a conventional impedance-matched driver.