A Precise Bandwidth Control Arbitration Algorithm for Hard Real-Time SoC Buses

Authors:
Bu-Ching Lin;Geeng-Wei Lee;Juinn-Dar Huang;Jing-Yang Jou
Affiliations:
Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan. kurt@eda.ee.;Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan. kurt@eda.ee.;Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan. kurt@eda.ee.;Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan. kurt@eda.ee.
Venue:
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Year:
2007

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Cited 1

An optimal warning-zone-length assignment algorithm for real-time and multiple-QoS on-chip bus arbitration

ACM Transactions on Embedded Computing Systems (TECS)

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Abstract

On an SoC bus, contentions occur while different IP cores request the bus access at the same time. Hence an arbiter is mandatory to deal with the contention issue on a shared bus system. In different applications, IPs may have real-time and/or bandwidth requirements. It is very difficult to design an arbitration algorithm to simultaneously meet these two requirements. In this paper, we propose an innovative arbitration algorithm, RB_lottery, to meet both of the requirements. It can provide not only the hard real-time guarantee but also the precise bandwidth controllability. The experimental results show that RB_lottery outperforms several well-known existing arbitration algorithms.