On non-preemptive scheduling of recurring tasks using inserted idle times
Information and Computation
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
The Design and Performance of a Real-Time CORBA SchedulingService
Real-Time Systems - Special issue on challenges in design and implementation of middlewares for real time systems
Markov Decision Processes: Discrete Stochastic Dynamic Programming
Markov Decision Processes: Discrete Stochastic Dynamic Programming
Digital Control of Dynamic Systems
Digital Control of Dynamic Systems
Introduction to Reinforcement Learning
Introduction to Reinforcement Learning
A tool for describing and evaluating hierarchical real-time bus scheduling policies
Proceedings of the 40th annual Design Automation Conference
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
A Feedback Control Approach for Guaranteeing Relative Delays in Web Servers
RTAS '01 Proceedings of the Seventh Real-Time Technology and Applications Symposium (RTAS '01)
Mode Change Protocols for Priority-Driven Preemptive Scheduling
Mode Change Protocols for Priority-Driven Preemptive Scheduling
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
Proceedings of the conference on Design, automation and test in Europe - Volume 2
QNoC: QoS architecture and design process for network on chip
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Networks on chip
Performance analysis of different arbitration algorithms of the AMBA AHB bus
Proceedings of the 41st annual Design Automation Conference
Real Time Scheduling Theory: A Historical Perspective
Real-Time Systems
Fine Grain QoS Control for Multimedia Application Software
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Pruning-based, energy-optimal, deterministic I/O device scheduling for hard real-time systems
ACM Transactions on Embedded Computing Systems (TECS)
QoS Control Strategies for High-Quality Video Processing
Real-Time Systems
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks
VLSID '06 Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design
A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Improving the scalability of SAMBA bus architecture
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Prediction-based flow control for network-on-chip traffic
Proceedings of the 43rd annual Design Automation Conference
Period optimization for hard real-time distributed automotive systems
Proceedings of the 44th annual Design Automation Conference
A Highly Integrated 8mW H.264/AVC Main Profile Real-time CIF Video Decoder on a 16MHz SoC Platform
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
A Precise Bandwidth Control Arbitration Algorithm for Hard Real-Time SoC Buses
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Runtime feasibility check for non-preemptive real-time periodic tasks
Information Processing Letters
The Lotterybus on-chip communication architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder
IEEE Transactions on Consumer Electronics
An efficient quality-aware memory controller for multimedia platform SoC
IEEE Transactions on Circuits and Systems for Video Technology
An analytical model for on-chip interconnects in multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
Hi-index | 0.01 |
In an advanced System-on-Chip (SoC) for real-time applications, the arbiter of its on-chip communication subsystem needs to support multiple QoS criteria while providing a hard real-time guarantee. To fulfill both objectives, the arbitration algorithm must dynamically switch between NonReal-Time (NRT) and Real-Time (RT) modes such that use of the RT mode is minimized to best accommodate the overall QoS criteria. In this article, we define a model for this problem, and propose optimal solutions to its associated problems with static and dynamic warning-zone-length assignment. Compared with previous works, the proposed approach enables a bus arbiter to use much less RT mode in providing a Real-Time (RT) guarantee and, therefore, gives the arbiter more opportunity to employ non-RT modes to achieve better overall QoS. Experimental results show that the proposed approach reduces RT mode usage by as much as 37.1%. Moreover, that reduction in RT mode usage helps cut the execution time by 27.0% when applying our approach to an industrial DRAM controller. Another case study on an AMBA-compliant ultra-high-resolution H.264 decoder IP shows that the proposed approach reduces RT mode usage by 26.4%, which leads to an average reduction of 10.4% in decoding time. Finally, when implementing a 16 master arbiter, it costs only 6.9K and 9.5K gates of overhead using the proposed static and dynamic approach, respectively. Therefore, the proposed approach is suitable for real-time SoC applications.