Communication synthesis for distributed embedded systems
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Automatic synthesis of interfaces between incompatible protocols
DAC '98 Proceedings of the 35th annual Design Automation Conference
Communication synthesis for distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Proceedings of the 37th Annual Design Automation Conference
Constraint-driven communication synthesis
Proceedings of the 39th annual Design Automation Conference
Voice over Packet Networks
Scheduling for Embedded Real-Time Systems
IEEE Design & Test
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
Proceedings of the tenth international symposium on Hardware/software codesign
Scalable QoS Supports for Multimedia Applications in the Next-Generation Internet
RTAS '01 Proceedings of the Seventh Real-Time Technology and Applications Symposium (RTAS '01)
Hierarchical QoS Management for Time Sensitive Applications
RTAS '01 Proceedings of the Seventh Real-Time Technology and Applications Symposium (RTAS '01)
VORAL: A System for Voice Over IP Routing in Application Layer
RTAS '01 Proceedings of the Seventh Real-Time Technology and Applications Symposium (RTAS '01)
Efficient scheduling of sporadic, aperiodic, and periodic tasks with complex constraints
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Analysis of a window-constrained scheduler for real-time and best-effort packet streams
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Scheduling the CAN bus with earliest deadline techniques
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Proceedings of the 42nd annual Design Automation Conference
Dynamically configurable bus topologies for high-performance on-chip communication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACM Transactions on Embedded Computing Systems (TECS)
Embedded Systems Design
A comparison of compositional schedulability analysis techniques for hierarchical real-time systems
ACM Transactions on Embedded Computing Systems (TECS)
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We present a tool suite for building, simulating, and analyzing the results of hierarchical descriptions of the scheduling policy for modules sharing a bus in real-time applications. These schedules can be based on a variety of factors including characteristics of messages and time slicing and are represented in a hierarchical tree-like structure that specifies multiple levels of arbitration. This structure can describe many popular arbitration schemes. Our simulator evaluates the specified scheduling structure on a set of message traces for a given bus. We illustrate our approach by applying it to two examples: the SAE Automotive Benchmark and Voice Over IP (VoIP). Although this paper deals with just bus scheduling policies, the approach can be easily extended to other real-time scheduling problems.