An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder

Authors:
T. Takizawa;M. Hirasawa
Affiliations:
Multimedia Res. Labs., NEC Corp.;-
Venue:
IEEE Transactions on Consumer Electronics
Year:
2001

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Abstract

This paper presents an efficient memory arbitration algorithm for a system on a chip. We have implemented the algorithm into a single chip MPEG2 AV decoder. According to simulations, the memory access efficiency of the arbiter based on the new algorithm is around 95% with a 32-bit 133 MHz SDRAM, while those of conventional arbiters are less than 80%