IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms
Proceedings of the 47th Design Automation Conference
A synergetic operating unit on NoC layer for CMP system
International Journal of High Performance Systems Architecture
Journal of Systems Architecture: the EUROMICRO Journal
Power-aware dynamic memory management on many-core platforms utilizing DVFS
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
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The required processing performance of embedded processor core is getting higher and higher without increasing power consumption dramatically. In same time, large SoC design has more risk of re-spin and long design time due to the complexity and difficulty of verification. ARM offers multi core solution to overcome such a situation over various applications.