RTL design of LDPC decoder for IEEE802.11n WLAN
ISCIT'09 Proceedings of the 9th international conference on Communications and information technologies
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This paper has presented various Min-Sum related LDPC decoding algorithms and their typical hardware architectures of check node update in the scenario of parallel implementation. For one check node update of Normalized Min-Sum algorithm, if the current row weight is c d , c d multiplications are needed. If c d is large, c d multiplications are needed, which leads to high complexity. In this article, one innovative method for check node update has been found, which can obviously reduce the number of comparison/selection operations for the Row Weight Matched Min-Sum Algorithm of high rate LDPC codes. Simulations have claimed the performance of Row Weight Matched Min-Sum is nearly the same as that of Log-BP, namely the optimal algorithm, which has shown that Row Weight Matched Min-Sum are good choices for LDPC decoding. Keywords: LDPC, CNU, BP, Min-Sum