CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Instruction scheduling for VLIW processors under variation scenario
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Compiler-assisted power optimization for clustered VLIW architectures
Parallel Computing
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Continuous technology scaling has resulted in an in- crease in both, the power density as well as the variation in device dimensions (process variations) of the manufactured processors. Both power density and process variations have a significant impact on the leakage power. Therefore, power optimization techniques should be sensitive to the variation in leakage power due to both temperature as well as process variations. Operation to Functional Units Binding Mecha- nism (OFBM) is the mechanism to dynamically issue oper- ations to Functional Units (FUs) in superscalar processors. We propose a Leakage-Aware OFBM (LA-OFBM), which is both temperature and process variation aware. Our experi- mental results demostrate that LA-OFBM reduces the mean and standard deviation of the total energy consumption of ALUs by 18%, and 46% respectively, as compared to the traditional OFBM, without any performance penalty.