A novel hardware-software co-design for automatic white balance

  • Authors:

  • Chin-Hsing Chen;Sun-Yen Tan;Wen-Tzeng Huang

  • Affiliations:

  • Department of Management Information Systems, Central Taiwan University of Science and Technology, Taichung, Taiwan, R.O.C.;Department of Electronic Engineering, National Taipei University of Technology, Taipei, Taiwan, R.O.C.;Department of Electronic Engineering, National Taipei University of Technology, Taipei, Taiwan, R.O.C.

  • Venue:
  • MIV'07 Proceedings of the 7th Conference on 7th WSEAS International Conference on Multimedia, Internet & Video Technologies - Volume 7
  • Year:
  • 2007

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Abstract

As electronic techniques is continuous improved rapidly cameras or video camcorders used for image retrieval technology and development become digitalized. The color of the photographs would look very different due to differences in light projection illumination when we take a picture. Human eyes are able to automatically adjust the color when the illuminations of the light source vary. However, the most frequently used image sensor, charge coupled device, CCD device can not correct the color as human eyes. This paper presents a hardware-software co-design method based on Lam's automatic white balance algorithm, which combines both Gray World Assumption and Perfect Reflector Assumption algorithms [1]. The execution steps of Lam's algorithm were divided into three stages. The hardware-software co-design and analysis for each stage was realized. Three factors including processing time, Slices and DSP48s of hardware resources were used to formulate the objective function, which was employed to evaluate the system performance and hardware resource cost. Experimental results shows suitable partitions of hardware-software co-designs were achieved. An embedded processor, MicroBlaze developed by Xilinx and a floating point processor were used to deal with the software part of the algorithm. The hardware part of the algorithm was implemented using an IP-based method. It is able to reduce the memory and CPU resources of PC as well as to have the properties of easy modification and function expansion by using such system on programmable chip architecture.