Impact of MOSFET parameters on its parasitic capacitances

Authors:
Nebi Caka;Milaim Zabeli;Myzafere Limani;Qamil Kabashi
Affiliations:
Faculty of Electrical and Computer Engineering, University of Prishtina, Kosovo;Faculty of Electrical and Computer Engineering, University of Prishtina, Kosovo;Faculty of Electrical and Computer Engineering, University of Prishtina, Kosovo;Faculty of Electrical and Computer Engineering, University of Prishtina, Kosovo
Venue:
EHAC'07 Proceedings of the 6th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
Year:
2007

Citing 5
Cited 0

Microelectronic circuits, 2nd ed.

Microelectronic circuits, 2nd ed.
Microelectronic circuits and devices

Microelectronic circuits and devices
Operation and Modeling of the Mos Transistor (The Oxford Series in Electrical and Computer Engineering)

Operation and Modeling of the Mos Transistor (The Oxford Series in Electrical and Computer Engineering)
Microelectronic Circuit Analysis and Design

Microelectronic Circuit Analysis and Design
CMOS Digital Integrated Circuits Analysis & Design

CMOS Digital Integrated Circuits Analysis & Design

Quantified Score

Hi-index	0.00

Visualization

Abstract

The aim of this paper is to calculate the MOSFET parasitic capacitances, and then based on the results obtained we can further see the impact of MOSFET physical parameters on these parasitic capacitances. These capacitances have a direct impact in the speed of operation of MOSFET circuits. Therefore, in order to increase the speed of operation, it is necessary that the parasitic capacitances are reduced to a minimum possible level that the technological process allows. We have analyzed the gate capacitance effect and junction capacitances as a function of the MOSFET dimensions.