CMOS implementation of a 1.6 GHz low voltage low phase noise quadrature output frequency synthesizer with automatic amplitude control

  • Authors:
  • Owen Casha;Ivan Grech;Joseph Micallef;Edward Gatt

  • Affiliations:
  • Department of Micro and Nanoelectronics, Faculty of Information and Communication Technology, University of Malta, Msida, Malta MSD 2080;Department of Micro and Nanoelectronics, Faculty of Information and Communication Technology, University of Malta, Msida, Malta MSD 2080;Department of Micro and Nanoelectronics, Faculty of Information and Communication Technology, University of Malta, Msida, Malta MSD 2080;Department of Micro and Nanoelectronics, Faculty of Information and Communication Technology, University of Malta, Msida, Malta MSD 2080

  • Venue:
  • Analog Integrated Circuits and Signal Processing
  • Year:
  • 2008

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Abstract

This article presents the design of a 1.2 V CMOS low phase noise quadrature output frequency synthesizer (FS) to be used for a GPS tuner application. Special reference is made to the design of a wide tuning range quadrature output voltage-controlled oscillator which is equipped with an automatic amplitude controller. It exhibits a phase noise response of less than 驴115 dBc/Hz at an offset of 1 MHz from the carrier and has a tuning range of over 36%. The effect of the automatic amplitude control is shown to improve phase noise at high oscillation frequencies and its noise has a negligible effect on the phase noise response even at low offset frequencies from the carrier. Preliminary analysis is presented showing the negligible effect of a DC---DC converter on the spurious level of the FS, included to permit the use of low sensitivity varactors. Design guidelines for reducing both the loop noise and the AM-to-PM conversion factors of the oscillator are also given. The design was made using the STMicroelectronics 0.13 μm HCMOS9-RF technology design kit.